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ISL97672B
If R 1 and R 2 are chosen such that the OVP level is set at 40V,
then V OUT is allowed to operate between 24V and 40V. If the V OUT
requirement is changed to an application of six LEDs of 21V, then
the OVP level must be reduced. Users should follow the
V OUT = (60% ~100%) OVP level requirement; otherwise, the
headroom control will be disturbed such that the channel voltage
can be much higher than expected. This can sometimes prevent
the driver from operating properly.
The resistances should be large, to minimize power loss. For
example, a 1M Ω R UPPER and a 30k Ω R LOWER sets OVP to 41.9V.
Large OVP resistors also allow C OUT to discharge slowly during the
PWM Off time. Parallel capacitors should also be placed across
the OVP resistors such that R UPPER /R LOWER = C LOWER /C UPPER .
Using a C UPPER value of 30pF is recommended. These capacitors
reduce the AC impedance of the OVP node, which is important
when using high-value resistors. For example, if R UPPER /R LOWER
= 33/1, then C UPPER /C LOWER = 1/33 with C UPPER = 100pF and
C LOWER = 3.3nF
UNDERVOLTAGE LOCK-OUT
If the input voltage falls below the UVLO level, the device stops
switching and is reset. Operation restarts only when V IN returns
to the normal operating range.
INPUT OVERCURRENT PROTECTION
During a normal switching operation, the current through the
internal boost power FET is monitored. If the current exceeds the
current limit, the internal switch is turned off. Monitoring occurs
on a cycle-by-cycle basis in a self-protecting way.
Additionally, the ISL97672B monitors the voltage at the LX and
OVP pins. At start-up, the LX pins inject a fixed current into the
output capacitor. The device does not start unless the voltage at
LX exceeds 1.2V. The OVP pin is also monitored such that if it
rises above and subsequently falls below 20% of the target OVP
level, the input protection FET is also switched off.
OVER-TEMPERATURE PROTECTION (OTP)
The ISL97672B includes two over-temperature thresholds. The
lower threshold is set to +130°C. When this threshold is reached,
any channel that is outputting current at a level significantly below
the regulation target is treated as “open circuit” and is disabled after
a time-out period. This time-out period is 800μs when it is above the
lower threshold. The lower threshold isolates and disables bad
channels before they cause enough power dissipation (as a result of
other channels having large voltages across them) to hit the upper
temperature threshold.
The upper threshold is set to +150°C. Each time this threshold is
reached, the boost stops switching, and the output current
sources switch off. Once the device has cooled to approximately
+100°C, the device restarts, with the DC LED current level
reduced to 75% of the initial setting. If dissipation persists,
subsequent hitting of the limit causes identical behavior, with the
current reduced in steps to 50% and finally 25%. Unless disabled
via the EN pin, the device stays in an active state throughout.
For complete details of fault protection conditions, see Figure 21
and Table 1.
VIN
LX
VOUT
/FLAG
DRIVER
FAULT
O/P
SHORT
LX
OVP
IMAX
ILIMIT
LOGIC
FET
DRIVER
VSC
CH0
FAULT FLAG
CH5
THRM
SHDN
OTP
REF
T2
TEMP
SENSOR
T1
FAULT
DETECT
VSET
Q0
VSET
Q5
LOGIC
11
PWM/OC0/SC0
PWM
GENERATOR
FIGURE 21. SIMPLIFIED FAULT PROTECTIONS
PWM/OC5/SC5
FN7995.1
November 22, 2013
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